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Senior ASIC Design Engineer / Senior ASIC / FPGA E

Job Description

Please find details for this position below: Client : IT Industry Title : Senior ASIC Design Engineer 1 Location : Melbourne, FL – 32902 Duration : 12 Months + (Possible of Extension) Looking for – ASIC Design Engineer / Senior ASIC Design Engineer / Senior Design Engineer 1 / ASIC / FPGA Engineer / Senior ASIC / FPGA Engineer / Hardware Design Engineer / Senior Hardware Design Engineer / HW/SW Engineer / Senior HW/SW Engineer / Senior HW/SW Engineer / HW/SW Designer / Senior HW/SW Designer / Electrical HW/SW Designer / Senior Electrical HW/SW Engineer Job Summary: • Become a member of the design team developing Next Generation High Frequency Communication products. • This position is for an experienced Senior Electrical or Computer Engineering candidate to be involved primarily in the testbench implementation and verification of a high performance digital FPGA for signal processing applications. • Perform architectural design-including block diagram, trade off studies and design reviews • Define requirements for a new design and develop requirements specification • Perform detailed design-including implementation, design analysis, and design reviews • Support board level FPGA integration • Verification environment architecture and design using SystemVerilog with OVM/UVM • Creation of written test cases, procedures and results, • Creating of code coverage tracking, and functional coverage tracking • Testbench development for the verification of RTL blocks using VHDL or SystemVerilog • Lead detailed design reviews • Prepare FPGA artifacts for FAA SOI 1,2,3,4 Audits per RTCA DO-254 • Act as a verification focal and oversee efforts of a small verification team including offsite team members • Recommend new tools and practices for continuous improvement Basic Qualifications: • MATLAB fixed-point modeling and matrix manipulation • VHDL • DSP experience with convolution, auto-correlation, FFTs, and discrete signals • Experience with math functions: multpliers, dividers, square root • Experience with hand coded implementations, above and beyond incorporating vendor COTS IP • Testbench development for the verification of RTL blocks using VHDL and/or SystemVerilog • Proficiency using FPGA simulation and synthesis tools (e.g. Questasim, Synplify, Modelsim, Xilinx ISE and Vivado) • Familiarity with chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog) • Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, and a project with a firm schedule and frequent milestones • Strong oral and written communication skills and the ability to document and present work status • Bachelor’s Degree in applicable engineering field

Job Requirements

Additional Desired Skills of a successful candidate: • FPGA lab validation with lab equipment (e.g Oscilloscopes, Logic Analyzers) • Experience with revision control concepts and tools (e.g Subversion, Git, RCS) • Experience with requirements management tool (e.g Jama) and change management tool (e.g. Jira) • Experience with object Oriented Programming concepts (e.g Java, C++, SystemVerilog OVM/UVM • Experience with Unix, scripting C, Python, and/or Perl • Digital circuit architecture, design, and resource tradeoffs • Experience with embedded System-On-Chip technologies, radio systems development. Should you have any questions, feel free to call Rohit Singh on 973-774-7809 or please send me your updated resume at rohit.singh@collabera.com. I look forward to working with you. LinkedIn Profile Link – https://www.linkedin.com/in/rohit-singh-9250b1106/

Job Snapshot

Location US-FL-Melbourne, FL
Employment Type Contract to Hire
Pay Type Hour
Pay Rate $65.00 - $70.00 /Hour
Store Type Other
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Company Overview

Collabera

At Collabera, you get a chance to do great work with some of the brightest people, without the frustration of being a nameless face in a sea of cubicles. We promote a culture of transparency and openness that embraces enthusiasm and passion. If you have what it takes, we want you to follow your passion. Whether that means working on cutting edge technology, understanding and overcoming business challenges, becoming a cross-discipline general practitioner or something else entirely. Learn More

Contact Information

US-FL-Melbourne, FL
Rohit Singh
9737747809
Snapshot
Collabera
Company:
US-FL-Melbourne, FL
Location:
Contract to Hire
Employment Type:
Hour
Pay Type:
$65.00 - $70.00 /Hour
Pay Rate:
Other
Store Type:

Job Description

Please find details for this position below: Client : IT Industry Title : Senior ASIC Design Engineer 1 Location : Melbourne, FL – 32902 Duration : 12 Months + (Possible of Extension) Looking for – ASIC Design Engineer / Senior ASIC Design Engineer / Senior Design Engineer 1 / ASIC / FPGA Engineer / Senior ASIC / FPGA Engineer / Hardware Design Engineer / Senior Hardware Design Engineer / HW/SW Engineer / Senior HW/SW Engineer / Senior HW/SW Engineer / HW/SW Designer / Senior HW/SW Designer / Electrical HW/SW Designer / Senior Electrical HW/SW Engineer Job Summary: • Become a member of the design team developing Next Generation High Frequency Communication products. • This position is for an experienced Senior Electrical or Computer Engineering candidate to be involved primarily in the testbench implementation and verification of a high performance digital FPGA for signal processing applications. • Perform architectural design-including block diagram, trade off studies and design reviews • Define requirements for a new design and develop requirements specification • Perform detailed design-including implementation, design analysis, and design reviews • Support board level FPGA integration • Verification environment architecture and design using SystemVerilog with OVM/UVM • Creation of written test cases, procedures and results, • Creating of code coverage tracking, and functional coverage tracking • Testbench development for the verification of RTL blocks using VHDL or SystemVerilog • Lead detailed design reviews • Prepare FPGA artifacts for FAA SOI 1,2,3,4 Audits per RTCA DO-254 • Act as a verification focal and oversee efforts of a small verification team including offsite team members • Recommend new tools and practices for continuous improvement Basic Qualifications: • MATLAB fixed-point modeling and matrix manipulation • VHDL • DSP experience with convolution, auto-correlation, FFTs, and discrete signals • Experience with math functions: multpliers, dividers, square root • Experience with hand coded implementations, above and beyond incorporating vendor COTS IP • Testbench development for the verification of RTL blocks using VHDL and/or SystemVerilog • Proficiency using FPGA simulation and synthesis tools (e.g. Questasim, Synplify, Modelsim, Xilinx ISE and Vivado) • Familiarity with chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog) • Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, and a project with a firm schedule and frequent milestones • Strong oral and written communication skills and the ability to document and present work status • Bachelor’s Degree in applicable engineering field

Job Requirements

Additional Desired Skills of a successful candidate: • FPGA lab validation with lab equipment (e.g Oscilloscopes, Logic Analyzers) • Experience with revision control concepts and tools (e.g Subversion, Git, RCS) • Experience with requirements management tool (e.g Jama) and change management tool (e.g. Jira) • Experience with object Oriented Programming concepts (e.g Java, C++, SystemVerilog OVM/UVM • Experience with Unix, scripting C, Python, and/or Perl • Digital circuit architecture, design, and resource tradeoffs • Experience with embedded System-On-Chip technologies, radio systems development. Should you have any questions, feel free to call Rohit Singh on 973-774-7809 or please send me your updated resume at rohit.singh@collabera.com. I look forward to working with you. LinkedIn Profile Link – https://www.linkedin.com/in/rohit-singh-9250b1106/
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Senior ASIC Design Engineer / Senior ASIC / FPGA E Apply now