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Verification Engineer

Job Description

Role/Title         Verification Engineer

Location          Palm Bay, FL 32905

Duration          06 Months

 

Job Description:

Utilize high-level architectural documentation along with algorithm descriptions to create self-checking and reusable test benches from scratch. Develop reusable agents, top level testbench modules and environments Define and implement functional coverage model based upon DUT requirements and close code coverage. Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements. Thorough understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test. Work independently to develop test bench solutions. Preferred Additional Skills: 3+ years of experience in ASIC / FPGA verification using C/C++ and/or System Verilog. 3+ years of experience with building and setting up scalable simulation/verification environments. Experience with and understanding of Altera and/or Xilinx FPGA architectures. Experience with Vivado and/or Quartus tool suite. Ability to obtain a Secret security clearance. Proficiency with hardware verification languages: System Verilog, System Verilog Assertions Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc. Proficient in scripting languages: bash/csh, Perl, Python, etc. Revision Control Systems: svn, git Proficient in Linux Environments Constrained Random Verification Experience highly desired. Experience with packet-based protocols (PCI Express etc.), Network-centric designs (Ethernet, IP, FC). Experience with high speed memory interfaces (DDRx) Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions. Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust.

Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering and Systems Engineering is desired.

Job Requirements

Education: BS Degree in electrical/computer engineering and 9+ years of professional relevant experience, OR, a MS in electrical/computer engineering and 7+ years of professional relevant experience. 5+ years of experience verifying ASICs / FPGAs. 3+ years of experience with verification methodology like OVM / UVM.

Job Snapshot

Location US-FL-Palm Bay
Employment Type Contractor
Pay Type Year
Pay Rate N/A
Store Type Engineering & Aerospace
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Company Overview

ACS Solutions

ACS Group provides services to Fortune 1000 companies across various industry verticals. With a proven track record of managing project demands while improving the efficiency, productivity and profitability of new and existing projects through process improvement, ACS Group is consistently recognized for identifying and implementing strategic solutions that create and preserve long-term business value. Learn More

Contact Information

US-FL-Palm Bay
Naval Sisodia
Snapshot
ACS Solutions
Company:
US-FL-Palm Bay
Location:
Contractor
Employment Type:
Year
Pay Type:
N/A
Pay Rate:
Engineering & Aerospace
Store Type:

Job Description

Role/Title         Verification Engineer

Location          Palm Bay, FL 32905

Duration          06 Months

 

Job Description:

Utilize high-level architectural documentation along with algorithm descriptions to create self-checking and reusable test benches from scratch. Develop reusable agents, top level testbench modules and environments Define and implement functional coverage model based upon DUT requirements and close code coverage. Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements. Thorough understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test. Work independently to develop test bench solutions. Preferred Additional Skills: 3+ years of experience in ASIC / FPGA verification using C/C++ and/or System Verilog. 3+ years of experience with building and setting up scalable simulation/verification environments. Experience with and understanding of Altera and/or Xilinx FPGA architectures. Experience with Vivado and/or Quartus tool suite. Ability to obtain a Secret security clearance. Proficiency with hardware verification languages: System Verilog, System Verilog Assertions Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc. Proficient in scripting languages: bash/csh, Perl, Python, etc. Revision Control Systems: svn, git Proficient in Linux Environments Constrained Random Verification Experience highly desired. Experience with packet-based protocols (PCI Express etc.), Network-centric designs (Ethernet, IP, FC). Experience with high speed memory interfaces (DDRx) Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions. Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust.

Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering and Systems Engineering is desired.

Job Requirements

Education: BS Degree in electrical/computer engineering and 9+ years of professional relevant experience, OR, a MS in electrical/computer engineering and 7+ years of professional relevant experience. 5+ years of experience verifying ASICs / FPGAs. 3+ years of experience with verification methodology like OVM / UVM.
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Verification Engineer Apply now