Role/Title – Sr Design Engineer 1 Duration – 12 months contract with possible extension Location – Melbourne, FL RESPONSIBILITIES: • Support Xilinx FPGA verification utilizing System Verilog • Develop FPGA architecture and documentation • Experience with

Job Description: Capture and document the flowed down functional requirements, and develop and document the derived requirements for FPGAs Design FPGA architectural diagrams, develop VHDL to implement the design critical functionality Follow DO-254 progra

Job Description: Must have advanced level experience with FPGA design and verification Expertise with one or more of the following: FPGA development of Xilinx devices using the Vivado tool suite FPGA development of Microchip/Microsemi/Actel devices using

Synthetic Scene Generation Engineer to support research and development for the United States Air Force Research Lab. This position will be part of a team of scientists and engineers that provide simulated scenes and environments for hardware-in-the-loop